Freescale-semiconductor StarCore SC140 Manual de usuario descargar pdf (Pagina 316)

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A-2 SC140 DSP Core Reference Manual

DSP Core Instruction Set

A.1.1 Conventions

Table A-1 lists the conventions used in this appendix to define the instructions.

Table A-1. Instruction Conventions

Convention Definition

( ) Indirect address

aa Absolute address

Cn Control registers

Da Single source/destination data register

Da:Db Source/destination data register pair

De.E; Do.E Data register extension (bits 39:32 + Ln bit)

De.E:Do.E Data register extension pair (e.g., D4.E:D5.E)

Db Single source data register

De Even numbered data/core register

Dn Destination data register

Do Odd numbered data/core register

DR Data or address register

Ea Effective address

HP High portion (bits [31:16]) of a register

Ln Limit tag bit

LP Low portion (bits [15:0]) of a register

rc Rounding constant

Rn Address register

rx AGU source register

Rx AGU source/destination register

{ } If used at the end of a line, the intent is merely for clarity purposes,

and this is not part of the assembler syntax.

However, note that if this is used in assembler code, the contents

will be understood as ISAP instructions.

[b:a] Bit range a to b in a register or memory

[a] Bit number a in a register or memory

1 2 ... 311 312 313 314 315 316 317 318 319 320 321 ... 759 760

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