Freescale-semiconductor StarCore SC140 Manual de usuario descargar pdf (Pagina 174)

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4-64 SC140 DSP Core Reference Manual

Event Selector (ES) Registers

4.10.3 Event Selector Mask Debug Exception

This 16-bit register has one bit for each source of event selection. Setting the appropriate bit enables the

related source to cause a debug exception.

Figure 4-25 displays the bit configuration of ESEL_DI.

Figure 4-25. Event Selector Mask Debug Exception (ESEL_DI)

If multiple sources are configured to cause a debug exception, they are ANDed or ORed according to the

value of the SELDI bit in the ESEL_CTRL. For more information, see Section 4.10.1, “Event Selector

Control Register (ESEL_CTRL).” If all the bits are set to zero, the ES does not issue a debug exception.

4.10.4 Event Selector Mask Enable Trace Register

(ESEL_ETB)

This 16-bit register has one bit for every source of the ES. Setting the appropriate bit configures the related

source to enable trace.

Figure 4-26 displays the bit configuration of ESEL_ETB.

Figure 4-26. Event Selector Mask Enable Trace (ESEL_ETB)

If multiple sources are configured to enable trace, they are ANDed or ORed according to the value of the

SELETB bit in the ESEL_CTRL. If all the bits are set to zero, the ES does not enable trace.

The same event cannot be configured to both enable and disable tracing.

BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 BIT 0

DEBUGE

EE4 EE3 EE2 EE1 EE0 COUNT EDCD

EDCA

TYPE rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw

RESET 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 BIT 0

DEBUGE

EE4 EE3 EE2 EE1 EE0

COUN

EDCD

EDCA

TYPE rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw

RESET 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

1 2 ... 169 170 171 172 173 174 175 176 177 178 179 ... 759 760

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