
i.MX27 PDK 1.0 Hardware User's Guide, Rev. 1.0 Freescale Semiconductor
4-4
4.3 CPLD on the Debug Board
A complex programmable logic device (CPLD) is an electronic component used to build
reconfigurable digital circuits. The CPLD provides a great deal of functionality, including glue
logic, which is needed to achieve compatible interfaces between two (or more) different
off-the-shelf integrated circuits. For the 3-Stack board, glue logic provides peripheral bus address
decoding, board control and status signals, board revision registers, and other functions, and is
implemented with a CPLD on the Debug board.
4.3.1 CPLD Features
The CPLD provides the following key features:
• A 16-bit slave interface to the CPU data bus
• Address decode and control for the Ethernet controller
• Address decode and control for the external UART controller
• Level shift for Ethernet signals and UART signals
• Control and status registers for various board functions
4.3.2 CPLD Memory Map
Table 4-2 CPLD Memory Map
CS5
_B
A16 A15 A14 A5 A4 A3 A2 Description
0 0 0 0 X X X X SMSC LAN9217 Ethernet 10/100BT
0 0 0 1 X X X X External UART-A
0 0 1 0 X X X X External UART-B
0 0 1 1 X X X X Reserved
0 1 0 0 0 0 0 0 Read/Write LED's (1=on, 0=off)
0 1 0 0 0 0 0 1 Read Only Switches/Buttons
0 1 0 0 0 0 1 0 Read Only Status - Interrupts, Interrupt latch
0 1 0 0 0 0 1 1 Read/Write - Interrupt Mask
0 1 0 0 0 1 0 0 Write - Interrupt reset
0 1 0 0 0 1 0 1 R/W Software Override: Set UART-B/CPU UART
routing
0 1 0 0 0 1 1 0 R/W Software Override: Enable/Disable Flash
Access, select CSx
0 1 0 0 0 1 1 1 Software Override 3 reserved
0 1 0 0 1 0 0 0 Read Only Returns AAAA
0 1 0 0 1 0 0 1 Read Only Returns 5555
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